Integrated circuits, as with any manufactured product, are susceptible to defects. These defects can often be identified through `burn-in` testing conducted at specification extremes. This testing assists in identifying infant failures by forcing the integrated circuit to operate at temperature and voltage extremes.
Alternate testing can be conducted on an integrated circuit to test application specific features. These can be tests conducted at both normal operating voltages and burn-in level voltages. Further, these alternate tests are typically conducted by the manufacture and not intended to be used by a purchaser of the integrated circuit. As such, an electronic key is typically provided to allow the manufacture to initiate an application specific test mode. In integrated memory circuits one of the external input pins is typically used to access the ken. By placing a voltage on the input pin which is a predetermined level above the maximum specified supply voltage, the memory circuit enters a specific test mode. This voltage level is referred to as a supervoltage. A supervoltage detector circuit is, therefore, provided to detect when a supervoltage is presented on the external input pin.
Consumer demand for memory circuits having increased memory capacity has created a generation of memory circuits which operate at supply voltages as low 3.3 volts. These memory circuits have an increased density and due to fabrication constraints have a lower breakdown voltage level than prior 5 volt memories. A problem occurs when a memory circuit is being burn-in tested and an application specific test is initiated. To conduct a burn-in test the supply voltage is raised to an upper voltage limit. To initiate a specific test, a supervoltage which is a predetermined voltage level above the supply voltage must be provided. During burn-in testing this supervoltage level is often above the breakdown voltage for a 3.3 volt memory. As known to those skilled in the art, exceeding the breakdown level of a memory device can be catastrophic and defeat the purpose of burn-in testing.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a low voltage memory circuit which can be operated in an application specific test mode during burn-in testing without exceeding breakdown voltage levels.